2.1.5 Overflow

What Is Overflow?

Overflow occurs when the result of an arithmetic operation is too large (or too small) to be stored in the number of bits available. The result cannot be correctly represented and the stored value is incorrect.

Every register or memory location has a fixed width (e.g. 8 bits). If a calculation produces a result outside the representable range, the extra bit(s) are lost and the stored value is wrong — sometimes dramatically so.

Overflow in Unsigned Arithmetic

For an 8-bit unsigned system (range 0–255), overflow occurs when the result exceeds 255. The carry out of the MSB is lost.

Worked example: 200 + 100 = 300

  11001000  (200)
+ 01100100  (100)
──────────
1 00101100  (300 — requires 9 bits)

The 9th bit (carry out) is lost. Only 8 bits are stored: 00101100 = 44. The correct answer is 300 but the system records 44 — overflow has occurred.

Overflow in Signed (Two's Complement) Arithmetic

For 8-bit two's complement (range −128 to +127), signed overflow occurs when:

Two positive numbers are added and the result exceeds +127 (MSB of result is 1 — looks negative).
Two negative numbers are added and the result is less than −128 (MSB of result is 0 — looks positive).

Example: +100 + +80 = +180 (exceeds +127)

  01100100  (+100)
+ 01010000  (+80)
──────────
  10110100  (signed: −76 — wrong!)

Both operands are positive but the result has MSB=1, which two's complement interprets as negative. Overflow has occurred: 180 > 127.

Overflow detection is critical in systems where incorrect values could cause errors — such as financial calculations, control systems or sensor readings.

Key Takeaways

Overflow occurs when a result exceeds the range of available bits.
For 8-bit unsigned: overflow if result > 255 (carry out of MSB is lost).
For 8-bit two's complement: overflow if two positives sum to a negative-looking result (>+127) or two negatives sum to a positive-looking result (<−128).
Overflow produces an incorrect stored value — real systems must detect and handle it.